A Family of Analog Neural Halftoning Techniques

@inproceedings{bgrzd_eusipco88,
    author  = "Bernard, T. and Garda, P. and Reichart, A. and Zavidovique, B. and Devos, F. ",
    title   = "A Family of Analog Neural Halftoning Techniques",
  booktitle = "Proc. European Signal Processing Conf.",
    address = "Grenoble, France",
    pages   = "1565-1568",
    month   = sep,
    year    = 1988
}

Abstract
In order to build a parallel smart sensor, we are involved in the design of a monolithic array of cellular processors operating upon binary pictures. Dealing with continuous-tone scenes requires halftoning techniques, implementable in solid state circuit. In this paper, we present a family of energies to be minimized, involving the analog acquired picture and the resulting halftoned binary pictures. We show that their neural minimization allow a very compact analog implementation using switched capacitor networks. We illustrate the effectiveness of this novel halftoning technique with picture processing examples.

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